Hrvoje Niksic writes:
Martin Buchholz <martin(a)xemacs.org> writes:
> In my opinion, the disadvantages outweigh the advantages, at least for
> the changes you are planning. When the changes are done, no end user
> will see any advantage from the changes, except that build times will
> be a little slower.
The *huge* disadvantage of using a custom preprocessor is that in that
case your code is no longer C code, which means that it cannot be
analyzed with the usual C tools such as lint or cflow, debugged with
You fail to mention the potentially very great difficulty that would
be felt by other important C tools named Hrvoje, Martin, James, and
Seriously, I had to support code written by a fellow that wrote his
own preprocessor (for an assembly language, but that doesn't matter).
Basically, I inherited like 10,000 lines of code that was essentially
in its own language. There were great plusses of his preprocessor --
a single statement did all the work for a procedure call -- but it
was his language, and so debugging it was impossible (no text books
A better way to change the world might be to write elisp skeleton
macros (using skeleton.el) that makes it real easy to insert C
procedure definitions frameworks with all the interface stuff for
elisp calling there already.
In my mode verilog-mode.el, I have a AUTO feature that does local
analysis of verilog code and then updates declarations based on other
data that is in the procedure definition. Perhaps something could be
written in elisp that would look at a C procedure, that is written
according to a defined structure (I.E., has comments inserted at key
points that say /* AUTOARG */ ) and update the routine definition to
make it conform to what is needed for the c - elisp interface.
If we're going through that route, then let's rather work on a full
elisp-to-C translator and write as much stuff as possible in elisp.
Also a good idea.
//' Michael McNamara <mac(a)verisity.com>
_ // Sr VP Technology 650-934-6888
\ // Verisity Design 650-934-6801 FAX
Get my verilog emacs mode from <http://www.verilog.com>